In a conventional real time oscilloscope, a trigger circuit detects a trigger event of an input signal and enables a display device such as a cathode-ray tube (CRT) to display a waveform of the signal during a time interval around the trigger event. It is known to produce a trigger circuit responsive to any one of several types of anomalous events, including narrow or wide pulses, or glitches. As such, pulse width detectors/generators need to operate over a large range of time intervals. Typically, large time intervals are best-resolved using counter-timer circuits including a digital counter. Digital counters provide a time resolution equal to the desired time interval within plus or minus one half of a clock cycle.
Counter-timer circuits including a digital counter, however, are not appropriate for very short time intervals of time since the desired resolution would necessitate a very short counter period and therefore an extremely high clock frequency. The shorter time intervals are best addressed using an analog system having, for example, a ramp generator in conjunction with a comparator.
An example of a system that combines the benefits of a ramp timer and a counter is known from U.S. Pat. No. 5,124,597 issued Jun. 23, 1992 to Stuebing, et al. entitled “Timer circuit including an analog ramp generator and a CMOS counter”, which is incorporated herein by reference in its entirety. In the Stuebing et al. patent, a timer circuit providing a wide range of time intervals includes a ramp generator and comparator circuit. The timer circuit receives an input signal to start a ramp signal, and produces an End of Ramp output signal when the ramp reaches a predetermined amplitude. A counter circuit is responsive to the End of Ramp signal to begin counting, and produces a terminal count output signal indicating that a preselected time interval has expired. The End of Ramp signal and the terminal count signal are combined in an AND gate to provide a signal that is delayed by a predetermined amount from the input signal.
The apparatus of Steubing, et al. is useful for determining the duration of an input pulse, for example, in pulse width triggering applications. In such applications one may trigger on a pulse width shorter than a given duration, or on a pulse width longer than a given duration. While the apparatus of Stuebing, et al. works well for its intended purpose, it has been found that its circuit is able to resolve the width of the input pulse only to within one clock period, because the input signal is asynchronous to Counter's clock.